PRESS RELEASES & PAPERS
BLOG POSTS
PAPERS
- N. Bosbach, A. Salama, L. Jünger, M. Burton, N. Zurstraßen, R. Pelke, R. Leupers, "NQC2: A Non-Intrusive QEMU Code Coverage Plugin", RAPIDO '24: Proceedings of the Rapid Simulation and Performance Evaluation: Methods and Tools, Munich, Germany, 2024
- N. Bosbach, L. Jünger, and R. Leupers, "Open-Source Virtual Platforms for Industry and Research", Design and Verification Conference & Exhibition Europe (DVCon Europe), Munich, Germany, 2023
- L. Jünger, J. Weinstock M. Jassi, M. Yoshinaga, H. Hamao, and K. Sato, "Virtual ECUs with QEMU and SystemC TLM-2.0", Design and Verification Conference & Exhibition Europe (DVCon Europe), Munich, Germany, 2023
- L. Jünger, J. Weinstock and R. Leupers, "SIM-V: Fast, Parallel RISC-V Simulation for Rapid Software Verification", Design and Verification Conference & Exhibition Europe (DVCon Europe), Munich, Germany, 2022
PRESS RELEASES
- 2024-04-09: IAR, Nuclei, and MachineWare Join Forces to Speed Up Innovation in RISC-V ASIL Compliant Automotive Solution
- 2024-02-27: Andes and MachineWare Collaborate on Early RISC-V Software Development for AndesCoreTM AX45MPV
- 2023-11-06: TASKING, Andes, and MachineWare Team up to Facilitate Rapid Development of RISC-V ASIL Compliant Automotive Silicon.
- 2023-10-05: MachineWare announces new ARM processor simulation and SystemC profiling products, adds Windows support.
- 2023-05-29: Ashling announce RiscFree™ support for MachineWare’s SIM-V™ RISC-V Instruction Set Simulator.